CPUID 0x00000000, 0x00000000: Maximum Basic Leaf and Vendor Identification Maximum Basic Leaf: 0x0000000A Identification String: GenuineIntel CPUID 0x00000001, 0x00000000: Basic Processor Version and Features Signature: 0x000106CA Processor: Type 0, Family 6, Model 28, Stepping 10 Architecture: Bonnell (Diamondville, Pineview, Stellarton, Silverthorne) Brand Index: 0 CLFLUSH Line Size: 64 Byte Logical Processors: 2 Initial APIC ID: 0 Features: 0x0040E39D 0xBFE9FBFF SSE3 (Streaming SIMD Extensions 3) DTES64 (64-bit Debug Store) MONITOR (MONITOR/MWAIT Instructions) DS-CPL (Current Privilege Level Qualified Debug Store) EIST (Enhanced Intel SpeedStep) TM2 (Thermal Monitor 2) SSSE3 (Supplemental Streaming SIMD Extensions 3) CMPXCHG16B (CMPXCHG16B Instruction) xTPR (xTPR Update Control) PDCM (Performance Monitor and Debug Capability) MOVBE (MOVBE Instruction) FPU (Floating-Point Unit On-Chip) VME (Virtual 8086 Mode Enhancements) DE (Debugging Extensions) PSE (Page Size Extension) TSC (Time Stamp Counter) MSR (Model Specific Registers, RDMSR/WRMSR Instructions) PAE (Physical Address Extension) MCE (Machine Check Exception) CX8 (CMPXCHG8B Instruction) APIC (Advanced Programmable Interrupt Controller On-Chip) SEP (SYSENTER/SYSEXIT Instructions) MTRR (Memory Type Range Registers) PGE (Page Global Bit Extension) MCA (Machine Check Architecture) CMOV (Conditional Move Instructions) PAT (Page Attribute Table) CLFSH (CLFLUSH Instruction) DS (Debug Store) ACPI (Thermal Monitor and Clock Control) MMX (MMX Technology) FXSR (FXSAVE/FXRSTOR Instructions) SSE (Streaming SIMD Extensions) SSE2 (Streaming SIMD Extensions 2) SS (Self Snoop) HTT (Hyper-Threading Technology) TM (Thermal Monitor) PBE (Pending Break Enable) CPUID 0x00000002, 0x00000000: Cache and Translation Lookaside Buffer Information Descriptors: 0x4FBA5901 0x0E3080C0 0x00000000 0x00000000 Data TLB0: 16 Entries for 4 KB Pages, Fully Associative Data TLB1: 64 Entries for 4 KB Pages, 4-way Associative Instruction TLB: 32 Entries for 4 KB Pages Data TLB: 8 Entries for 4 KB and 4 MB Pages, 4-way Associative L2 Cache: 512 KB, 8-way Associative, 64 Byte Line Size L1 Instruction Cache: 32 KB, 8-way Associative, 64 Byte Line Size L1 Data Cache: 24 KB, 6-way Associative, 64 Byte Line Size CPUID 0x00000004, 0x00000000: Deterministic Cache Parameters Size: 24576 Byte Type: Data Level: 1 Self-Initializing: Yes Fully Associative: No (Reserved) 0 Sharing Logical Processors: 2 Cores in Physical Package: 1 System Coherency Line Size: 64 Byte Physical Line Partitions: 1 Ways of Associativity: 6 Number of Associativity Sets: 64 WBINVD Lower Levels: No Inclusive of Lower Levels: No Indexing Function: Direct Mapped (Reserved) 0 CPUID 0x00000004, 0x00000001: Deterministic Cache Parameters Size: 32768 Byte Type: Instruction Level: 1 Self-Initializing: Yes Fully Associative: No (Reserved) 0 Sharing Logical Processors: 2 Cores in Physical Package: 1 System Coherency Line Size: 64 Byte Physical Line Partitions: 1 Ways of Associativity: 8 Number of Associativity Sets: 64 WBINVD Lower Levels: No Inclusive of Lower Levels: No Indexing Function: Direct Mapped (Reserved) 0 CPUID 0x00000004, 0x00000002: Deterministic Cache Parameters Size: 524288 Byte Type: Unified Level: 2 Self-Initializing: Yes Fully Associative: No (Reserved) 0 Sharing Logical Processors: 2 Cores in Physical Package: 1 System Coherency Line Size: 64 Byte Physical Line Partitions: 1 Ways of Associativity: 8 Number of Associativity Sets: 1024 WBINVD Lower Levels: No Inclusive of Lower Levels: No Indexing Function: Direct Mapped (Reserved) 0 CPUID 0x00000005, 0x00000000: MONITOR/MWAIT Information Smallest Monitor Line Size: 64 Byte (Reserved) 0 Largest Monitor Line Size: 64 Byte (Reserved) 0 Features: 0x00000003 EMX (Enumerate MONITOR/MWAIT Extensions) IBE (Interrupt Break Event) C0 Sub C-States for MWAIT: 0 C1 Sub C-States for MWAIT: 2 C2 Sub C-States for MWAIT: 2 C3 Sub C-States for MWAIT: 0 C4 Sub C-States for MWAIT: 2 C5 Sub C-States for MWAIT: 0 C6 Sub C-States for MWAIT: 0 C7 Sub C-States for MWAIT: 0 CPUID 0x00000006, 0x00000000: Thermal and Power Management Features: 0x00000001 DTS (Digital Thermal Sensor) Interrupt Thresholds in Digital Thermal Sensor: 2 (Reserved) 0 Features: 0x00000001 HCFC (Hardware Coordination Feedback Capability) (Reserved) 0 CPUID 0x0000000A, 0x00000000: Architectural Performance Monitoring Version ID: 3 Number of General Purpose Performance Monitor Counters: 2 Width of General Purpose Performance Monitor Counters: 40 Bit Length of Bit Vector: 7 Bit Vector: 0x00000000 (Core Cycle Event) (Instruction Retired Event) (Reference Cycles Event) (Last-Level Cache Reference Event) (Last-Level Cache Misses Event) (Branch Instruction Retired Event) (Branch Mispredict Retired Event) (Reserved) 0 Number of Fixed Function Performance Monitor Counters: 3 Width of Fixed Function Performance Monitor Counters: 40 Bit (Reserved) 0 Any Thread Deprecation: No (Reserved) 0 CPUID 0x80000000, 0x00000000: Maximum Extended Leaf and Vendor Identification Maximum Extended Leaf: 0x80000008 (Reserved) 0 (Reserved) 0 (Reserved) 0 CPUID 0x80000001, 0x00000000: Extended Processor Information and Features Signature: 0x00000000 Processor: NONE (Reserved) 0 Features: 0x00000001 0x20100000 LAHF-SAHF (Long Mode LAHF/SAHF Instructions) NX (No-eXecute Page Protection) LM (Long Mode, AMD64/EM64T) CPUID 0x80000002, 0x00000000: Processor Brand String, Part 1 CPUID 0x80000003, 0x00000000: Processor Brand String, Part 2 CPUID 0x80000004, 0x00000000: Processor Brand String, Part 3 Intel(R) Atom(TM) CPU N450 @ 1.66GHz CPUID 0x80000006, 0x00000000: L2 Cache and Translation Lookaside Buffer Configuration (Reserved) 0 (Reserved) 0 L2 Cache Line Size: 64 Byte (Reserved) 0 L2 Cache Associativity: 8-way Associative L2 Cache Size: 512 KB (Reserved) 0 CPUID 0x80000008, 0x00000000: Virtual and Physical Address Sizes Physical Address: 32 Bit Linear Address: 48 Bit Guest Physical Address: 0 Bit (Reserved) 0 (Reserved) 0 Physical Cores: 1 (Reserved) 0 APIC ID Size: 1 Performance TSC Size: 40 Bit (Reserved) 0 (Reserved) 0