CPUID 0x00000000, 0x00000000: Maximum Basic Leaf and Vendor Identification Maximum Basic Leaf: 0x0000000D Identification String: GenuineIntel CPUID 0x00000001, 0x00000000: Basic Processor Version and Features Signature: 0x00050654 Processor: Type 0, Family 6, Model 85, Stepping 4 Architecture: Skylake (Bakerville, Basin Falls) Brand Index: 0 CLFLUSH Line Size: 64 Byte Logical Processors: 4 Initial APIC ID: 0 Features: 0xFFFA3203 0x1F8BFBFF SSE3 (Streaming SIMD Extensions 3) PCLMULQDQ (Carry-Less Multiplication, PCLMULQDQ Instruction) SSSE3 (Supplemental Streaming SIMD Extensions 3) FMA (Fused Multiply-Add) CMPXCHG16B (CMPXCHG16B Instruction) PCID (Process Context Identifiers) SSE4_1 (Streaming SIMD Extensions 4.1) SSE4_2 (Streaming SIMD Extensions 4.2) x2APIC (x2APIC Support) MOVBE (MOVBE Instruction) POPCNT (POPCNT Instruction) TSC-Deadline (APIC supports one-shot operation using a TSC deadline value) AES (Advanced Encryption Standard Instructions) XSAVE (XSAVE/XRSTOR/XSETBV/XGETBV Instructions) OSXSAVE (XSAVE/XRSTOR/XSETBV/XGETBV enabled by Operating System) AVX (Advanced Vector Extensions) F16C (Half-Precision Floating-Point Support) RDRAND (RDRAND Instruction) HYPERVISOR (Hypervisor present) FPU (Floating-Point Unit On-Chip) VME (Virtual 8086 Mode Enhancements) DE (Debugging Extensions) PSE (Page Size Extension) TSC (Time Stamp Counter) MSR (Model Specific Registers, RDMSR/WRMSR Instructions) PAE (Physical Address Extension) MCE (Machine Check Exception) CX8 (CMPXCHG8B Instruction) APIC (Advanced Programmable Interrupt Controller On-Chip) SEP (SYSENTER/SYSEXIT Instructions) MTRR (Memory Type Range Registers) PGE (Page Global Bit Extension) MCA (Machine Check Architecture) CMOV (Conditional Move Instructions) PAT (Page Attribute Table) PSE-36 (36-bit Page Size Extension) CLFSH (CLFLUSH Instruction) MMX (MMX Technology) FXSR (FXSAVE/FXRSTOR Instructions) SSE (Streaming SIMD Extensions) SSE2 (Streaming SIMD Extensions 2) SS (Self Snoop) HTT (Hyper-Threading Technology) CPUID 0x00000002, 0x00000000: Cache and Translation Lookaside Buffer Information Descriptors: 0x76036301 0x00F0B5FF 0x00000000 0x00C30000 Data TLB: 32 Entries for 2 MB or 4 MB Pages, 4-way Associative, and a separate array with 4 Entries for 1 GB Pages, 4-way Associative Data TLB: 64 Entries for 4 KB Pages, 4-way Associative Instruction TLB: 8 Entries for 2 MB or 4 MB Pages, Fully Associative CPUID 0x00000002 does not report cache descriptor information; use CPUID 0x00000004 to query cache parameters! Instruction TLB: 64 Entries for 4 KB Pages, 8-way Associative 64 Byte Prefetching Shared L2 TLB: 1536 Entries for 4 KB and 2 MB Pages, 6-way Associative; also 16 Entries for 1 GB Pages, 4-way Associative CPUID 0x00000004, 0x00000000: Deterministic Cache Parameters Size: 32768 Byte Type: Data Level: 1 Self Initializing: Yes Fully Associative: No (Reserved) 0 Sharing Logical Processors: 2 Cores in Physical Package: 2 System Coherency Line Size: 64 Byte Physical Line Partitions: 1 Ways of Associativity: 8 Number of Associativity Sets: 64 WBINVD Lower Levels: Yes Inclusive of Lower Levels: No Indexing Function: Direct Mapped (Reserved) 0 CPUID 0x00000004, 0x00000001: Deterministic Cache Parameters Size: 32768 Byte Type: Instruction Level: 1 Self Initializing: Yes Fully Associative: No (Reserved) 0 Sharing Logical Processors: 2 Cores in Physical Package: 2 System Coherency Line Size: 64 Byte Physical Line Partitions: 1 Ways of Associativity: 8 Number of Associativity Sets: 64 WBINVD Lower Levels: Yes Inclusive of Lower Levels: No Indexing Function: Direct Mapped (Reserved) 0 CPUID 0x00000004, 0x00000002: Deterministic Cache Parameters Size: 1048576 Byte Type: Unified Level: 2 Self Initializing: Yes Fully Associative: No (Reserved) 0 Sharing Logical Processors: 2 Cores in Physical Package: 2 System Coherency Line Size: 64 Byte Physical Line Partitions: 1 Ways of Associativity: 16 Number of Associativity Sets: 1024 WBINVD Lower Levels: Yes Inclusive of Lower Levels: No Indexing Function: Direct Mapped (Reserved) 0 CPUID 0x00000004, 0x00000003: Deterministic Cache Parameters Size: 25952256 Byte Type: Unified Level: 3 Self Initializing: Yes Fully Associative: No (Reserved) 0 Sharing Logical Processors: 4 Cores in Physical Package: 2 System Coherency Line Size: 64 Byte Physical Line Partitions: 1 Ways of Associativity: 11 Number of Associativity Sets: 36864 WBINVD Lower Levels: Yes Inclusive of Lower Levels: No Indexing Function: Complex (Reserved) 0 CPUID 0x00000006, 0x00000000: Thermal and Power Management Features: 0x00000006 IDA (Intel Dynamic Acceleration/Intel Turbo Boost Technology) ARAT (Always Running APIC Timer) Interrupt Thresholds in Digital Thermal Sensor: 0 (Reserved) 0 Features: 0x00000001 HCFC (Hardware Coordination Feedback Capability) Enhanced Hardware Feedback Interface Classes: 0 (Reserved) 0 CPUID 0x00000007, 0x00000000: Structured Extended Feature Flags Enumeration Maximum Sub-Level: 0 Features: 0xD19F4FBB 0x00000018 0x00000000 FSGSBASE (RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE Instructions) TSC_ADJUST (Time Stamp Counter Adjust) BMI1 (Bit Manipulation Instruction Set 1) HLE (Hardware Lock Elision) AVX2 (Advanved Vector Extensions 2) SMEP (Supervisor Mode Execution Prevention) BMI2 (Bit Manipulation Instruction Set 2) ERMS (Enhanced REP MOVSB/STOSB Instructions) INVPCID (INVPCID Instruction) RTM (Restricted Transactional Memory) MPX (Memory Protection Extensions) AVX512F (AVX-512 Foundation) AVX512DQ (AVX-512 Doubleword and Quadword Instructions) RDSEED (RDSEED Instruction) ADX (Multi-Precision Add-Carry Extension, ADCX/ADOX Instructions) SMAP (Supervisor Mode Access Prevention, CLAC/STAC Instructions) CLFLUSHOPT (CLFLUSHOPT Instruction) CLWB (CLWB Instruction) AVX512CD (AVX-512 Conflict Detection Instructions) AVX512BW (AVX-512 Byte and Word Instructions) AVX512VL (AVX-512 Vector Length Instructions) PKU (Memory Protection Keys for User Mode Pages, RDPKRU/WRPKRU Instructions) OSPKE (Memory Protection Keys for User Mode Pages Enabled by Operating System) CPUID 0x0000000B, 0x00000000: Extended Topology Enumeration Topology ID to x2APIC ID Multiplier: 2 (Reserved) 0 Number of Logical Processors at Level: 2 (Reserved) 0 Level Number: 0 Level Type: 1 (Reserved) 0 x2APIC ID: 0 CPUID 0x0000000B, 0x00000001: Extended Topology Enumeration Topology ID to x2APIC ID Multiplier: 4 (Reserved) 0 Number of Logical Processors at Level: 2 (Reserved) 0 Level Number: 1 Level Type: 2 (Reserved) 0 x2APIC ID: 0 CPUID 0x0000000D, 0x00000000: Processor Extended State Enumeration Supported User Mode Components: 0x00000000 0x000002FF X87 (FPU State, FPU and MMX Registers) SSE (SSE State, MXCSR and XMM Registers) AVX (AVX State, Upper Halves of YMM Registers) BNDREG (MPX State, BND0 to BND3 Registers) BNDCSR (MPX State, BNDCFGU and BNDSTATUS Registers) OPMASK (AVX-512 State, K0 to K7 Registers) ZMM_HI256 (AVX-512 State, Upper Halves of Lower ZMM Registers) HI16_ZMM (AVX-512 State, Upper ZMM Registers) PKRU (Protection Key Rights for User Mode Pages State) Save Area Size for Enabled Components: 2696 Byte Save Area Size for Supported Components: 2696 Byte CPUID 0x0000000D, 0x00000001: Processor Extended State Enumeration Features: 0x0000000F XSAVEOPT (Performance Optimized Save Extended States Support) XSAVEC (XSAVEC Instruction) XG1 (XGETBV/XSETBV Instructions) XSS (XSAVES/XRSTORS Instructions) Save Area Size for Enabled Components: 2568 Byte Supported Supervisor Mode Components: 0x00000000 0x00000000 NONE CPUID 0x0000000D, 0x00000002: Processor Extended State Enumeration, Component 2 Component Save Area Size: 256 Byte Component Save Area Offset: 576 Byte Component Support Mode: User Mode Compacted Format Alignment: 1 Byte XFD Faulting Mode: No (Reserved) 0 (Reserved) 0 CPUID 0x0000000D, 0x00000003: Processor Extended State Enumeration, Component 3 Component Save Area Size: 64 Byte Component Save Area Offset: 960 Byte Component Support Mode: User Mode Compacted Format Alignment: 1 Byte XFD Faulting Mode: No (Reserved) 0 (Reserved) 0 CPUID 0x0000000D, 0x00000004: Processor Extended State Enumeration, Component 4 Component Save Area Size: 64 Byte Component Save Area Offset: 1024 Byte Component Support Mode: User Mode Compacted Format Alignment: 1 Byte XFD Faulting Mode: No (Reserved) 0 (Reserved) 0 CPUID 0x0000000D, 0x00000005: Processor Extended State Enumeration, Component 5 Component Save Area Size: 64 Byte Component Save Area Offset: 1088 Byte Component Support Mode: User Mode Compacted Format Alignment: 1 Byte XFD Faulting Mode: No (Reserved) 0 (Reserved) 0 CPUID 0x0000000D, 0x00000006: Processor Extended State Enumeration, Component 6 Component Save Area Size: 512 Byte Component Save Area Offset: 1152 Byte Component Support Mode: User Mode Compacted Format Alignment: 1 Byte XFD Faulting Mode: No (Reserved) 0 (Reserved) 0 CPUID 0x0000000D, 0x00000007: Processor Extended State Enumeration, Component 7 Component Save Area Size: 1024 Byte Component Save Area Offset: 1664 Byte Component Support Mode: User Mode Compacted Format Alignment: 1 Byte XFD Faulting Mode: No (Reserved) 0 (Reserved) 0 CPUID 0x0000000D, 0x00000009: Processor Extended State Enumeration, Component 9 Component Save Area Size: 8 Byte Component Save Area Offset: 2688 Byte Component Support Mode: User Mode Compacted Format Alignment: 1 Byte XFD Faulting Mode: No (Reserved) 0 (Reserved) 0 CPUID 0x40000000, 0x00000000: Maximum Hypervisor Leaf and Vendor Identification Maximum Hypervisor Leaf: 0x40000010 Identification Signature: KVMKVMKVM CPUID 0x40000001, 0x00000000: Hypervisor Interface Identification Interface Signature: 0x0100007B (Reserved) 0 (Reserved) 0 (Reserved) 0 CPUID 0x40000010, 0x00000000: VMware Hypervisor Timing Information Time Stamp Counter Frequency: 2999999 kHz Bus (Local APIC Timer) Frequency: 1000000 kHz (Reserved) 0 (Reserved) 0 CPUID 0x80000000, 0x00000000: Maximum Extended Leaf and Vendor Identification Maximum Extended Leaf: 0x80000008 (Reserved) 0 (Reserved) 0 (Reserved) 0 CPUID 0x80000001, 0x00000000: Extended Processor Information and Features Signature: 0x00000000 Processor: NONE (Reserved) 0 Features: 0x00000121 0x2C100800 LAHF_SAHF (Long Mode LAHF/SAHF Instructions) ABM (Advanced Bit Manipulation, LZCNT Instruction) PREFETCHW (PREFETCH/PREFETCHW Instructions) SEP (SYSCALL/SYSRET Instructions) NX (No-eXecute Page Protection) PAGE1GB (Gigabyte Pages) RDTSCP (Read Time Stamp Counter and Processor ID Instruction) LM (Long Mode, AMD64/EM64T) CPUID 0x80000002, 0x00000000: Processor Brand String, Part 1 CPUID 0x80000003, 0x00000000: Processor Brand String, Part 2 CPUID 0x80000004, 0x00000000: Processor Brand String, Part 3 Intel(R) Xeon(R) Platinum 8124M CPU @ 3.00GHz CPUID 0x80000006, 0x00000000: L2 Cache and Translation Lookaside Buffer Configuration (Reserved) 0 (Reserved) 0 L2 Cache Line Size: 64 Byte (Reserved) 0 L2 Cache Associativity: 8-way Associative L2 Cache Size: 256 KB (Reserved) 0 CPUID 0x80000007, 0x00000000: Thermal and Power Management Capabilities (Reserved) 0 (Reserved) 0 (Reserved) 0 Features: 0x00000100 INVARIANT_TSC (Invariant Time Stamp Counter) CPUID 0x80000008, 0x00000000: Virtual and Physical Address Sizes Physical Address: 46 Bit Linear Address: 48 Bit Guest Physical Address: 0 Bit (Reserved) 0 (Reserved) 0 Physical Threads: 1 (Reserved) 0 APIC ID Size: 1 Performance TSC Size: 40 Bit (Reserved) 0 INVLPGB Maximum Page Count: 0 RDPRU Maximum ECX Value: 0 XGETBV 0x00000000: Extended Control Register XCR0 XSAVE Feature Set: 0x00000000000002FF X87 (FPU and MMX Registers Support) SSE (MXCSR and XMM Registers Support) AVX (Upper Halves of YMM Registers Support) BNDREG (BND Registers Support) BNDCSR (BNDCFGU and BNDSTATUS Registers Support) OPMASK (OPMASK Registers Support) ZMM_HI256 (Upper Halves of Lower ZMM Registers Support) HI16_ZMM (Upper ZMM Registers Support) PKRU (PKRU Register Support)